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職位描述：
職責(zé)描述：
1. full custom layout for analog and digital circuits in high performance chips.
2. floor planning signal- and bus planning according to predefined specifications.
3. chip size optimization.
4. area- and parasitic optimized layout.
5. assembly of blks and top level hierarchies including routing.
6. verification of circuits (design rule check, layout versus schematic, electrical rule check).
7. generation of fill structures according to technology requirements.
8. optical simulations on technology driven circuits.
9. investigations on electro migration and ir drop.
任職要求：
1. bachelor in microelectronics, electronic engineering, or related field.
2. familiar with cad software.
3. familiar with semiconductor process and structures of devices.
4. team oriented, love to work in young, international and highly motivated teams.
5. good communication skills.
6. high grade of flexibility.
7. highly motivated and engaged.
8. experience in digital analog and/or mixture signal ic is preferred.
9. experience in backend design flow (apr) is preferred.
10. english language skill in writing and speaking is a must.